VLSI and FPGA Design Techniques

Without the MCNC and ISPD98 benchmarks, it would arguably not have been possible for the academic community to make consistent advances in physical design over the last decade. While still being used extensively in placement and floorplanning research, those benchmarks can no longer be considered representative of tod…

This paper presents an analog integrated circuit synthesis system based on an evolutionary approach. The system contains several novel features. One of these is the high-performance optimization algorithm, which is a combination of evolutionary strategies and simulated annealing. Modeling of dc parameters is done via…

• GÜNHAN DÜNDAR

In this article, grey-box and black-box surrogate modeling are described, with some key findings. The important point is that surrogate modeling has a solid mathematical basis leading to what has become a dramatic increase in our ability to develop engineering models and to engineer systems. In Section 2, a systematic…

• MUSTAFA BERKE YELTEN

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• REVNA ACAR VURAL

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• TÜLAY YILDIRIM

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• ENGİN AFACAN

Many current designs contain a large number of standard cells intermixed with larger macro blocks. The range of size in these “mixed block ” designs complicates the placement process considerably; traditional methods produce results that are far from satisfactory. In this paper we extend the traditional recursive bise…

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This paper presents an Integer Linear Programming (ILP) approach to the instruction-set extension identification problem. An algorithm that iteratively generates and solves a set of ILP problems in order to generate a set of templates is proposed. A selection algorithm that ranks the generated templates based on isomo…

In this paper, we present improvements to recursive bisection based placement. In contrast to prior work, our horizontal cut lines are not restricted to row boundaries; this avoids a “narrow region” problem. To support these new cut line positions, a dynamic pro-gramming based legalization algorithm has been developed…

Noise arising from line-to-line coupling is a major problem for deep submicron design, and present technology trends are causing an increase in this type of noise. Common current methods to decrease coupling noise include shielding and buffering, both of which can increase overall power dissipation. An alternative met…