Interconnection Networks and Systems

In embedded computing, cost, power, and performance constraints call for the design of specialized processors, rather than for the use of the existing off-the-shelf solutions. While the design of these application-specific CPUs could be tackled from scratch, a cheaper and more effective option is that of extending the…

• KUBİLAY ATASU

The "one--size--fits--all" philosophy used for permanently allocating datapath resources in today's superscalar CPUs to maximize performance across a wide range of applications results in the overcommitment of resources in general. To reduce power dissipation in the datapath, the resource allocations can be dynamicall…

The use of computer communication networks has been rapidly increasing in order to: (1) share expensive hardware and software resources, and (2) provide access to main system from distant locations. The reliability and cost of these systems are important and are largely determined by network topology. Network topology…

• FULYA ALTIPARMAK BAYKOÇ

Specialized hardware accelerators can significantly improve the performance and power efficiency of compute systems. In this paper, we focus on hardware accelerators for graph analytics applications and propose a configurable architecture template that is specifically optimized for iterative vertex-centric graph appli…

Many current designs contain a large number of standard cells intermixed with larger macro blocks. The range of size in these “mixed block ” designs complicates the placement process considerably; traditional methods produce results that are far from satisfactory. In this paper we extend the traditional recursive bise…

Specialized hardware accelerators can significantly improve the performance and power efficiency of compute systems. In this paper, we focus on hardware accelerators for graph analytics applications and propose a configurable architecture template that is specifically optimized for iterative vertex-centric graph appli…

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• SÜLEYMAN TOSUN

This paper introduces two new high-speed quasi delay insensitive (QDI) asynchronous pipeline templates. These new high throughput templates support complex non-linear pipeline structures and are well suited for fine-grain pipelining. Timing analysis and HSPICE simulations show that these templates are 20% and 40% fast…

Ever shrinking technologies in VLSI era made it possible to place several modules onto a single die. However, the need for the new communication methods has also increased dramatically since traditional bus-based systems suffer from signal propagation delays, signal integrity, and scalability. network-on-chip (NoC) is…

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• ZHİBİN DU

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• KAMER KAYA

We consider the problem of optimally placing a given number of wavelength converters on a path to minimize the call blocking probability. Using a simple performance model, we first prove that uniform spacing of converters is optimal for the end-to-end performance when the link loads are uniform and statistically indep…